The present invention relates to a capacitor, and a semiconductor device comprising the capacitor, more specifically to a capacitor using a dielectric thin film, and a semiconductor device comprising the capacitor.
The present invention also relates to a semiconductor device and a method for fabricating the semiconductor device, more specifically to a semiconductor device which can ensure stable operation in high frequency region, and a method for fabricating the semiconductor device.
Generally, a decoupling capacitor is mounted near an LSI (Large Scale Integrated Circuit), etc. mounted on a circuit wiring substrate, for the prevention of erroneous operation due to source voltage variations and high frequency noises.
The substrate of the decoupling capacitor is independent of the circuit wiring substrate and is suitably mounted on the circuit wiring substrate.
Recently, as LSIs, etc. have higher speed and lower power consumption, the decoupling capacitor is required to have characteristics improved. As LSIs, etc. are more down-sized, the decoupling capacitor is required to be down-sized.
Then, techniques of increasing capacitances while satisfying the requirement of down-sizing the decoupling capacitor have been proposed.
A proposed capacitor will be explained with reference to FIG. 36. FIG. 36 is a sectional view of the proposed capacitor.
As shown in FIG. 36, a conducting film 312 formed of a 50 nm-thickness Ti film and a 200 nm-thickness Pt film laid the latter on the former is formed on a silicon substrate 310. On the conducting film 312, a 200 nm-thickness dielectric film 314 of BST ((Ba,Sr)TiO3), which is highly dielectric, is formed.
On the dielectric film 314, a conducting film 318 of a 200 nm-thickness Pt film is formed. On the conducting film 318, a dielectric film 322 is formed of a 200 nm-thickness BST film. The conducting film 322 is formed, covering the conducting film 318.
On the dielectric film 322, a conducting film 334 is formed of a 200 nm-thickness Pt film, connected to the conducting film 312 through an opening 324.
Further on the entire surface, a passivation film 338 of polyimide is formed. In the passivation film 338, a contact hole 340 and a contact hole 342 are formed respectively down to the conducting film 334 and the conducting film 318.
A conducting film 344 is formed on the inside surfaces of the contact holes 340, 342. Conductor plugs 346a, 346b of Pt are buried respectively in the contact holes 340, 342 with the conducting film 344 formed on the inside surfaces. Solder bumps 348a, 348b are formed respectively on the conductor plugs 346a, 346b. 
The conducting film 312 and the conducting film 334 form a first electrode 350 of the capacitor. The first electrode 350 is electrically connected to electric source lines of, e.g., circuit wiring substrate (not shown) through the conductor plug 34a and the solder bump 348a, etc.
The conducting film 318 forms a second electrode 352 of the capacitor. The second electrode 352 is electrically connected to ground lines of, e.g., the circuit wiring substrate (now shown) through the conductor plug 346b, and the solder bump 348b, etc. The proposed capacitor 354 is thus formed.
In the capacitor shown in FIG. 36, a material of the dielectric films 314, 322 is BST, which is dielectric, and the dielectric films 314, 322 are as thin as 200 nm. The capacitor can have improve capacitances. Furthermore, in the capacitor shown in FIG. 36, the conducting films 312, 334 forming the first electrode 350 is formed are formed below and above the conducting film 318 forming the second electrode 352 respectively with the dielectric films 314, 322 intervening. Thus, the capacitor can increase capacitances while satisfying the requirement of downsizing.
However, the capacitor shown in FIG. 36 has the voltage resistance lowered. Reasons for the lower voltage resistance have not been made clear, and the lower voltage resistance has been a barrier to practicing the proposed capacitor.
Recently, digital LSIs, etc., typically microprocessors, have the operation speed increased and the electric power consumption decreased.
In order to operate an LSI in a high frequency region of the GHz band and at low voltages, it is very important that source voltage variations due to abrupt load impedance variations of the LSI are depressed, and high frequency noises of the electric sources are removed.
Conventionally, the decoupling capacitor is mounted near an LSI or others mounted on a circuit wiring substrate, whereby source voltage variations are depressed, and high frequency noises are removed. The decoupling capacitor is formed on a substrate independent of the circuit wiring substrate and is suitably mounted on the circuit wiring substrate.
In mounting the decoupling capacitor near an LSI mounted on a circuit wiring substrate, the LSI and the decoupling capacitor are electrically connected through the wire formed on the circuit wiring substrate, and large inductance due to the wiring is present. When large inductance is present between the LSI and the decoupling capacitor, source voltage variations cannot be sufficiently depressed, and high frequency noises cannot be sufficiently removed.
Here, in order to shorten the wring between the LSI and decoupling capacitor, it is proposed to mount the decoupling capacitor directly on the LSI. Mounting the decoupling capacitor directly on the LSI will be able to decrease inductance between the LSI and the decoupling capacitor.
However, in simply mounting the decoupling capacitor directly on the LSI, the decoupling capacitor will be a barrier to flip chip bonding, which is advantageous for high speed operation.
The specification of Japanese Patent Laid-Open Publication No. Hei 9-223861/1997 discloses a technique of mounting a semiconductor chip on the surface of a circuit wiring substrate, mounting the decoupling capacitor on the back side of the circuit wiring substrate, and electrically connecting the semiconductor chip and the decoupling capacitor through a via formed in the circuit wiring substrate. However, some inductance is present due to the via formed in the circuit wiring substrate, whereby source voltage variations cannot be depressed sufficiently, and high frequency noises cannot be removed sufficiently.
The specification of Japanese Patent Laid-Open Publication No. Hei 5-102389/1993 discloses a technique of mounting the decoupling capacitor on a memory IC. A long wiring pattern is present between the source pins and ground pins of the memory IC, and the decoupling capacitor, which makes it impossible to sufficiently depress source voltage variations and to remove high frequency noises.
The specification of Japanese Patent Laid-Open Publication No. Hei 9-64236/1997 discloses a technique of mounting the decoupling capacitor directly on a semiconductor chip. However, the decoupling capacitor has a very large thickness, and is not able to satisfy the requirements of down-sizing and higher density.
In order to improve operation speed, further it is very important that the wiring between the decoupling capacitor and an LSI is short, and also the wiring between the LSI and the other passive members, such as resistors, inductors, etc., is short. To this end, a technique of shortening not only the wiring between the decoupling capacitor and an LSI, but also the wiring between passive devices other than the decoupling capacitor and the LSI has been needed.
An object of the present invention is to provide a capacitor which can improve capacitance without lowering voltage resistance, and a semiconductor device with the capacitor, and a semiconductor device having the capacitor.
Another object of the present invention is to provide a semiconductor device which can meet the requirements of down-sizing and higher density while being able to ensuring stable operation in high-frequency region, and a method for fabricating the semiconductor device.
According to one aspect of the present invention, there is provided a capacitor comprising a first conducting film formed on a substrate, a first dielectric film formed on the first conducting film, a second conducting film formed on the first dielectric film, a second dielectric film formed above the second conducting film, covering an edge of the second conducting film, and a third conducting film formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film, the capacitor further comprising: an insulation film covering said edge of the second conducting film or said part of the second dielectric film. An effective thickness of the insulation film between the second conducting film and the third conducing film in the region near the edge of the second conducting film can be increased, whereby concentration of electric fields in the region near the edge of the second conducting film. Consequently, the capacitor can have large capacitance without lowering voltage resistance.
According to another aspect of the present invention, there is provided a semiconductor device comprising a capacitor, the capacitor comprising a first conducting film formed on a substrate, a first dielectric film formed on the first conducting film, a second conducting film formed on the first dielectric film, a second dielectric film formed above the second conducting film, covering an edge of the second conducting film, and a third conducting film formed above the second dielectric film, covering a part of the second dielectric film covering the edge of the second conducting film, the capacitor further comprising: an insulation film covering said edge of the second conducting film or said part of the second dielectric film. The semiconductor device includes a capacitor of high voltage resistance and large capacitance, and can be highly reliable.
According to farther another aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor element substrate; a passive component mounted on the semiconductor element substrate and electrically connected to electrodes of the semiconductor element substrate; column-shaped conductors formed on the semiconductor element substrate in a region other than a region where the passive component is mounted, and having a height which is substantially flush with at least the upper surface of the passive component, and an insulation layer burying the passive component and the column-shaped conductors, the upper surfaces of the column-shaped conductors being exposed on the surface of the insulation film. The passive component is mounted directly on the semiconductor element substrate, whereby the semiconductor element substrate and the passive component can be connected to each other at a very small distance. The column-shaped electrodes of a height which is substantially flush with the upper surface of the passive component are formed on the semiconductor element substrate, which allows the semiconductor element substrate to be flip chip-bonded to a circuit wiring substrate, etc. without interference by the passive component. Consequently, the semiconductor device can ensure stable operation in high frequency regions while satisfying the requirements of down-sizing and higher density.
According to farther another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor element substrate, and a passive component mounted on the semiconductor element substrate and electrically connected to electrodes of the semiconductor element substrate, the passive component including a passive element formed on a side of a support substrate opposed to the semiconductor element substrate, and the passive component including electrodes electrically connected to the passive element through the support substrate and exposed on the upper surface of the support substrate, and through-electrodes electrically connected to the semiconductor element substrate through the passive component and insulated from the passive element. Signal lines of the semiconductor element substrate can be connected to a circuit wiring substrate, etc. through the through-electrodes, whereby the signal lines of the semiconductor element substrate can be electrically connected to the circuit wiring substrate, etc. without forming the column-shaped conductors separately from the passive component. Consequently, semiconductor fabrication steps can be simplified and contribute to lower costs.
According to farther another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor element substrate, and a passive component including a passive element mounted on the semiconductor element substrate and electrically connected to electrodes of the semiconductor element substrate, the passive component including electrodes electrically connected to the passive element and exposed on the upper surface of the passive component, and through-electrodes electrically connected to the semiconductor element substrate through the passive component and insulated from the passive element. Signal lines of the semiconductor element substrate can be connected to a circuit wiring substrate, etc. through the through-electrodes, whereby the signal lines of the semiconductor element substrate can be electrically connected to the circuit wiring substrate, etc. without forming the column-shaped conductors separately from the passive component. Consequently, semiconductor fabrication steps can be simplified and contribute to lower costs.
According to farther another aspect of the present invention, there is provided a method for fabricating a semiconductor device comprising the steps of: forming column-shaped conductors on a semiconductor element substrate; mounting a passive component including a passive element formed on a side of a support substrate opposed to the semiconductor element substrate, on the semiconductor element substrate in a region other than a region where the column-shaped conductors are formed; forming an insulation layer, burying the column-shaped conductors and the passive component; and polishing the side of the upper surface of the support substrate together with the insulation layer. The side of the upper surface of the support substrate is polished, which makes it possible to thin the support substrate without breaking the passive component.
According to farther another aspect of the present invention, there is provided a method for fabricating a semiconductor device comprising the steps of: mounting on a semiconductor element substrate a passive component including a passive element formed on a side of a support substrate opposed to the semiconductor element substrate, electrodes electrically connected to the passive element through the support substrate and exposed on the upper surface of the support substrate, and through-electrodes passed through the support substrate and insulated from the passive element; and polishing the side of the upper surface of the support substrate. The side of the upper surface of the support substrate is polished, whereby a semiconductor device which can ensure stable operation in high frequency regions while satisfying the requirement of down-sizing and higher density can be provided.
According to the present invention, an effective thickness of the insulation film between the conducting film and the other conducting film is increased in the region near the edge of the conducting film, whereby concentration of electric fields on the region near the edge of the conducting film can be mitigated, and the capacitor can have larger capacitances without lower voltage resistance.
According to the present invention, the capacitor having high voltage resistance and large capacitances is mounted directly on an LSI, etc., whereby high frequency noises, etc. of source power can be removed very near the LSI, etc. Consequently, the present invention can provide semiconductor devices of high reliability.
According to the present invention, the capacitor is mounted directly on an LSI, whereby voltage variations of source power to be fed to the LSI can be effectively depressed, and high frequency noises of the source power to be fed to the LSI can be effectively removed. According to the present invention, the vias having a height substantially equal to the upper surface of the capacitor are formed on the electrodes of the LSI, whereby the LSI can be flip chip-bonded to a circuit wiring substrate or others without interference of the capacitor. According to the present invention, not only the capacitor but also other any passive components can be electrically connected to an LSI at a very short distance. Accordingly, the semiconductor device can satisfy the requirement of down-sizing and higher density while ensuring stable operation in high frequency regions.
According to the present invention, the capacitor is mounted on the entire surface of an LSI, whereby large capacitance can be ensured. Furthermore, according to the present invention, through-electrodes are provided in the capacitor, whereby the signal (S) lines of the LSI can be electrically connected to a circuit wiring substrate, etc. without forming the vias separately from the capacitor. Consequently, the present invention can provide a semiconductor device which can ensure stable operation in a high frequency region while satisfying the requirement of down sizing and higher density, and can contribute to simplifying the fabrication steps, low costs, etc.